PIC18F1230 MICROCHIP [Microchip Technology], PIC18F1230 Datasheet - Page 80

• Manufacturer Part Number: PIC18F1230
• Description: 18/20/28-Pin, Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1230/1330
7.7
Data EEPROM memory has its own code-protect bits in
Configuration
operations are disabled if either of these mechanisms
are enabled.
The microcontroller itself can both read and write to the
internal data EEPROM, regardless of the state of the
code-protect Configuration bit. Refer to Section 19.0
“Special Features of the CPU” for additional
information.
EXAMPLE 7-3:
TABLE 7-1:
DS39758B-page 78
INTCON
EEADR
EEDATA EEPROM Data Register
EECON2 EEPROM Control Register 2 (not a physical register)
EECON1
IPR2
PIR2
PIE2
Legend: x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used during Flash/
LOOP
Name
Operation During Code-Protect
CLRF
BCF
BCF
BCF
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BTFSC
BRA
INCFSZ EEADR, F
BRA
BCF
BSF
EEPROM Address Register
EEPROM access.
GIE/GIEH
OSCFIP
OSCFIF
OSCFIE
EEPGD
Bit 7
Words.
REGISTERS ASSOCIATED WITH DATA EEPROM MEMORY
EEADR
EECON1, CFGS
EECON1, EEPGD
INTCON, GIE
EECON1, WREN
EECON1, RD
55h
EECON2
0AAh
EECON2
EECON1, WR
EECON1, WR
$-2
Loop
EECON1, WREN
INTCON, GIE
DATA EEPROM REFRESH ROUTINE
PEIE/GIEL
External
CFGS
Bit 6
—
—
—
read
TMR0IE
Bit 5
—
—
—
—
and
Advance Information
write
INT0IE
FREE
; Start at address 0
; Set for memory
; Set for Data EEPROM
; Disable interrupts
; Enable writes
; Loop to refresh array
; Read current address
;
; Write 55h
;
; Write 0AAh
; Set WR bit to begin write
; Wait for write to complete
; Increment address
; Not zero, do it again
; Disable writes
; Enable interrupts
Bit 4
EEIP
EEIF
EEIE
WRERR
RBIE
Bit 3
7.8
The data EEPROM is a high-endurance, byte
addressable array that has been optimized for the
storage of frequently changing information (e.g.,
program variables or other data that are updated
often). Frequently changing values will typically be
updated more often than specification D124 or D124A.
If this is not the case, an array refresh must be
performed. For this reason, variables that change
infrequently (such as constants, IDs, calibration, etc.)
should be stored in Flash program memory.
A simple data EEPROM refresh routine is shown in
Example 7-3.
—
—
—
Note:
TMR0IF
Using the Data EEPROM
WREN
LVDIP
LVDIF
LVDIE
Bit 2
If data EEPROM is only used to store
constants and/or data that changes rarely,
an array refresh is likely not required. See
specification D124 or D124A.
INT0IF
Bit 1
WR
—
—
—
© 2006 Microchip Technology Inc.
RBIF
Bit 0
RD
—
—
—
Values on
Reset
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