PIC18F1230 MICROCHIP [Microchip Technology], PIC18F1230 Datasheet - Page 98

• Manufacturer Part Number: PIC18F1230
• Description: 18/20/28-Pin, Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1230/1330
10.4
The IPR registers contain the individual priority bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Priority registers (IPR1, IPR2 and IPR3). Using
the priority bits requires that the Interrupt Priority Enable
(IPEN) bit be set.
REGISTER 10-10: IPR1: PERIPHERAL INTERRUPT PRIORITY REGISTER 1
DS39758B-page 96
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
IPR Registers
Unimplemented: Read as ‘0’
ADIP: A/D Converter Interrupt Priority bit
1 = High priority
0 = Low priority
RCIP: EUSART Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TXIP: EUSART Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
CMP2IP: Analog Comparator 2 Interrupt Priority bit
1 = Enables the CMP2 interrupt
0 = Disables the CMP2 interrupt
CMP1IP: Analog Comparator 1 Interrupt Priority bit
1 = The output of CMP1 has changed since last read
0 = The output of CMP1 has not changed since last read
CMP0IP: Analog Comparator 0 Interrupt Priority bit
1 = The output of CMP0 has changed since last read
0 = The output of CMP0 has not changed since last read
TMR1IP: TMR1 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
ADIP
W = Writable bit
‘1’ = Bit is set
R/W-1
RCIP
Advance Information
R/W-1
TXIP
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CMP2IP
R/W-1
CMP1IP
R/W-1
© 2006 Microchip Technology Inc.
x = Bit is unknown
CMP0IP
R/W-1
TMR1IP
R/W-1
bit 0