PIC18F1230 MICROCHIP [Microchip Technology], PIC18F1230 Datasheet - Page 220

• Manufacturer Part Number: PIC18F1230
• Description: 18/20/28-Pin, Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1230/1330
BNOV
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39758B-page 218
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Overflow
If Overflow
Q1
No
Q1
PC
PC
Read literal
Read literal
operation
Branch if Not Overflow
BNOV
-128
if Overflow bit is ‘0’
(PC) + 2 + 2n
None
If the Overflow bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
Q2
No
Q2
‘n’
‘n’
=
=
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
n
127
0101
BNOV Jump
operation
Process
Process
Data
Data
PC
Q3
Q3
No
nnnn
Advance Information
operation
operation
Write to
Q4
PC
Q4
No
No
nnnn
BNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
Q1
No
Q1
PC
If Zero
If Zero
PC
PC
Read literal
Read literal
operation
Branch if Not Zero
BNZ
-128
if Zero bit is ‘0’
(PC) + 2 + 2n
None
If the Zero bit is ‘0’, then the program
will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
Q2
No
Q2
‘n’
‘n’
=
=
=
=
=
© 2006 Microchip Technology Inc.
n
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
127
0001
BNZ
operation
Process
Process
Data
Data
PC
Q3
Q3
No
Jump
nnnn
operation
operation
Write to
Q4
PC
No
Q4
No
nnnn