ADAU1966 AD [Analog Devices], ADAU1966 Datasheet - Page 11

• Manufacturer Part Number: ADAU1966
• Description: 16-Channel High Performance
• Manufacturer: AD [Analog Devices]

Pin No.
22, 39
23
24
25
27
28
31
32
33
34
35
36
37
38
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
Type
PWR
I
O
I
I/O
I/O
I
I
I
I
I
I
I
I
I
I/O
I
I
I
I
GND
PWR
O
O
O
O
O
O
O
O
PWR
I
I
GND
O
O
O
O
O
O
O
O
O
1
Mnemonic
IOVDD
VSENSE
VDRIVE
VSUPPLY
DBCLK
DLRCLK
DSDATA8/SA
DSDATA7/SA
DSDATA6
DSDATA5
DSDATA4
DSDATA3
DSDATA2
DSDATA1
CDATA/ADDR1/SA
COUT/SDA/SA
CCLK/SCL/SA
CLATCH/ADDR0/SA
SA_MODE
PU/RST
AGND1
AVDD1
DAC1P
DAC1N
DAC2P
DAC2N
DAC3P
DAC3N
DAC4P
DAC4N
AVDD2
DAC_BIAS1
DAC_BIAS2
AGND2
CM
TS_REF
DAC5P
DAC5N
DAC6P
DAC6N
DAC7P
DAC7N
DAC8P
Description
Power for Digital Input and Output Pins, 3.3 V to 5 V.
2.5 V Output of Regulator, Collector of Pass Transistor. Bypass with 10 μF in parallel
with 100 nF.
Drive for Base of Pass Transistor.
5 V Input to Voltage Regulator, Emitter of Pass Transistor. Bypass with 10 μF in parallel
with 100 nF.
Bit Clock for DACs.
Frame Clock for DACs.
DAC15 and DAC 16 Serial Data Input/SA_MODE TDM State (see the Standalone Mode
section, Table 15, and Table 16).
DAC13 and DAC 14 Serial Data Input/SA_MODE TDM State (see the Standalone Mode
section, Table 15, and Table 16).
DAC11 and DAC 12 Serial Data Input.
DAC9 and DAC 10 Serial Data Input.
DAC7 and DAC 8 Serial Data Input.
DAC5 and DAC 6 Serial Data Input.
DAC3 and DAC 4 Serial Data Input.
DAC1 and DAC 2 Serial Data Input.
Control Data Input (SPI)/Address 1 (I
section and Table 15).
Control Data Output (SPI)/Control Data Input (I
Standalone Mode section and Table 15).
Control Clock Input (SPI)/Control Clock Input (I
Mode section and Table 15).
Control Chip Select (SPI) (Low Active)/Address 0 (I
Standalone Mode section and Table 15).
Standalone Mode. This pin allows mode control of ADAU1966 using Pin 42 to Pin 45,
Pin 31, and Pin 32 (high active, see Table 15 and Table 16).
Power-Up/Reset (Low Active).
Analog Ground.
Analog Power.
DAC1 Positive Output.
DAC1 Negative Output.
DAC2 Positive Output.
DAC2 Negative Output.
DAC3 Positive Output.
DAC3 Negative Output.
DAC4 Positive Output.
DAC4 Negative Output.
Analog Power.
DAC Bias 1. AC couple with 470 nF to AVDD2.
DAC Bias 2. AC couple with 470 nF to AGND2.
Analog Ground.
Common-Mode Reference Filter Capacitor Connection. Bypass with 10 μF in parallel
with 100 nF to AGND2. This reference can be shut off in the PLL_CLK_CTRL1 register
and the pin can be driven with an outside voltage source.
Voltage Reference Filter Capacitor Connection. Bypass with 10 μF in parallel with
100 nF to AGND2.
DAC5 Positive Output.
DAC5 Negative Output.
DAC6 Positive Output.
DAC6 Negative Output.
DAC7 Positive Output.
DAC7 Negative Output.
DAC8 Positive Output.
Rev. 0 | Page 11 of 52
2
C)/SA_MODE State (see the Standalone Mode
2
2
C)/SA_MODE State (see the Standalone
C)/SA_MODE State (see the
2
C)/SA_MODE State (see the
ADAU1966