ADAU1966 AD [Analog Devices], ADAU1966 Datasheet - Page 32

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ADAU1966

Manufacturer Part Number
ADAU1966
Description
16-Channel High Performance
Manufacturer
AD [Analog Devices]
Datasheet

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ADAU1966
DAC CONTROL 2 REGISTER
Address: 0x08, Reset: 0x06, Name: DAC_CTRL2
Table 33. Bit Descriptions for DAC_CTRL2
Bits
[6:5]
4
3
2
1
0
Bit Name
VREG_CTRL
BCLK_TDMC
DAC_POL
AUTO_MUTE_EN
DAC_OSR
DE_EMP_EN
Settings
00
01
10
11
0
1
0
1
0
1
0
1
0
1
Description
Voltage Regulator Control. Select the Regulator Output Voltage.
Regulator Out = 2.5 V
Regulator Out = 2.75 V
Regulator Out = 3.0 V
Regulator Out = 3.3 V
DBCLK Rate in TDM Mode. Number of DBCLK cycles per channel slot when
in TDM mode.
32 BCLK cycles/channel slot
16 BCLK cycles/channel slot
DAC Output Polarity. This is a global switch of DAC polarity.
Noninverted DAC Output
Inverted DAC Output
Automute Enable. Automatically mutes the DACs when 1024 consecutive
zero input samples are received. This is independent per channel.
Auto-Zero Input Mute Disabled
Auto-Zero Input Mute Enabled
DAC Oversampling Rate. OSR Selection.
256 × f
128 × f
De-Emphasis Enable.
No De-Emphasis/Flat
De-Emphasis Enabled
S
S
DAC Oversampling
DAC Oversampling
Rev. 0 | Page 32 of 52
Reset
0x0
0x0
0x0
0x1
0x1
0x0
Access
RW
RW
RW
RW
RW
RW

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