ADAU1966 AD [Analog Devices], ADAU1966 Datasheet - Page 30

• Manufacturer Part Number: ADAU1966
• Description: 16-Channel High Performance
• Manufacturer: AD [Analog Devices]

ADAU1966
DAC CONTROL 0 REGISTER
Address: 0x06, Reset: 0x01, Name: DAC_CTRL0
Table 31. Bit Descriptions for DAC_CTRL0
Bits
[7:6]
[5:3]
[2:1]
0
Bit Name
SDATA_FMT
SAI
FS
MMUTE
[7:6] SDATA_FMT
SDATA Format
[5:3] SAI
Serial Audio Interface
00: I
01: Left-Justified—0-BCLK Cycle Delay
10: Right-Justified 24-bit Data—
11: Right-Justified 16-bit Data—
000: Stereo (I
001: TDM2—Octal Line
010: TDM4—Quad Line
011: TDM8—Dual Line
100: TDM16—Single Line (48 kHz)
101: Reserved
110: Reserved
111: Reserved
8-BCLK Cycle Delay
16-BCLK Cycle Delay
2
S—1-BCLK Cycle Delay
2
S, LJ, RJ)
Settings
000
001
010
011
100
101
110
111
B7
00
01
10
11
00
01
10
11
0
0
1
B6
Description
SDATA Format. Only used when SAI = 000.
I
Left-Justified—0-BCLK Cycle Delay
Right-Justified 24-bit Data—8-BCLK Cycle Delay
Right-Justified 16-bit Data—16-BCLK Cycle Delay
Serial Audio Interface. When SAI = 000, the SDATA_FMT bits control stereo
SDATA format.
Stereo (I
TDM2—Octal Line
TDM4—Quad Line
TDM8—Dual Line
TDM16—Single Line (48 kHz)
Reserved
Reserved
Reserved
Sample Rate Select.
32 kHz/44.1 kHz/48 kHz
64 kHz/88.2 kHz/96 kHz
128 kHz/176.4 kHz/192 kHz
128 kHz/176.4 kHz/192 kHz Low Propagation Delay
DAC Master Mute.
Normal Operation
All Channels Muted
0
2
S—1-BCLK Cycle Delay
B5
0
2
S, LJ, RJ)
B4
0
B3
0
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B2
0
B1
0
B0
1
[0] MMUTE
DAC Master Mute
[2:1] FS
Sample Rate Select
0: Normal Operation
1: All Channels Muted
00: 32 kHz/44.1kHz/48kHz
01: 64 kHz/88.2kHz/96kHz
10: 128 kHz/176.4kHz/192kHz
11: 128 kHz/176.4kHz/192kHz Low Propagation Delay
Reset
0x0
0x0
0x0
0x1
Access
RW
RW
RW
RW