ADAU1966 AD [Analog Devices], ADAU1966 Datasheet - Page 8

• Manufacturer Part Number: ADAU1966
• Description: 16-Channel High Performance
• Manufacturer: AD [Analog Devices]

ADAU1966
Parameter
I
DAC SERIAL PORT
2
C
t
t
t
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
COE
COD
COH
COTS
SCL
SCLL
SCLH
SCS
SCH
SSH
DS
SR
SF
BFT
DBH
DBL
DLS
DLH
DLS
DDS
DDH
SDA
SCL
t
SCH
t
SR
t
SCLL
Description
COUT enable from CCLK falling
COUT delay from CCLK falling
COUT hold from CCLK falling, not shown in Figure 14
COUT tristate from CCLK falling
See Figure 2 and Figure 13
SCL clock frequency
SCL low
SCL high
Setup time (start condition), relevant for repeated start
condition
Hold time (start condition), first clock generated after
this period
Setup time (stop condition)
Data setup time
SDA and SCL rise time
SDA and SCL fall time
Bus-free time between stop and start
See Figure 16
DBCLK high, slave mode
DBCLK low, slave mode
DLRCLK setup, time to DBCLK rising, slave mode
DLRCLK hold from DBCLK rising, slave mode
DLRCLK skew from DBCLK falling, master mode
DSDATAx setup to DBCLK rising
DSDATAx hold from DBCLK rising
Figure 2. I
t
SF
t
SCLH
t
Rev. 0 | Page 8 of 52
DS
2
C Timing Diagram
t
SCS
t
SCH
t
BFT
Min
30
1.3
0.6
0.6
0.6
0.6
100
1.3
10
10
10
5
−8
10
5
Typ
Max
30
30
30
400
300
300
+8
Unit
ns
ns
ns
ns
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns