FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 109

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FDC37N769_07

Manufacturer Part Number
FDC37N769_07
Description
3.3V Super I/O Controller with Infrared Support for Portable Applications
Manufacturer
SMSC [SMSC Corporation]
Datasheet
CR21 - CR22
Registers CR21 - CR22 are Reserved. Reserved bits cannot be written and return 0 when read.
CR23
CR23 can only be accessed in the configuration state and after the CSR has been initialized to 23H. The default
value of this register after power up is 00H (Table 104). CR23 is used to select the base address of the parallel
port. If EPP is not enabled, the parallel port can be set to 192 locations on 4-byte boundaries from 100H - 3FCH; if
EPP is enabled, the parallel port can be set to 96 locations on 8-byte boundaries from 100H - 3F8H (Table 105). To
disable the parallel port, set ADR9 and ADR8 to zero.
Parallel Port Address Decoding: nCS = ’0’ and A10 = ’0’ are required to access the Parallel Port when in Compatible,
Bi-directional, or EPP modes. A10 is active when in ECP mode.
CR24
CR24 can only be accessed in the configuration state and after the CSR has been initialized to 24H. The default
value of this register after power up is 00H (Table 106). CR24 is used to select the base address of Serial Port 1
(UART1). The serial port can be set to 96 locations on 8-byte boundaries from 100H - 3F8H. To disable Serial Port
1, set ADR9 and ADR8 to zero. Set CR24.0 to 0 when writing the UART1 Base Address.
Serial Port 1 Address Decoding: nCS = ’0’ and A10 = ’0’ are required to access UART1 registers. A[2:0] are decoded
as XXXb.
CR25
CR25 can only be accessed in the configuration state and after the CSR has been initialized to 25H. The default
value of this register after power up is 00H (Table 107). CR25 is used to select the base address of Serial Port 2
(UART2). Serial Port 2 can be set to 96 locations on 8-byte boundaries from 100H - 3F8H. To disable Serial Port 2,
set ADR9 and ADR8 to zero. Set CR25.0 to 0 when writing the UART2 Base Address.
Serial Port 2 Address Decoding: nCS = ’0’ and A10 = ’0’ are required to access UART2 registers. A[2:0] are decoded
as XXXb.
SMSC DS – FDC37N769
ADR9
ADR9
ADR9
DB7
DB7
DB7
ADR8
ADR8
ADR8
DB6
DB6
DB6
Table 104 - CR23: Parallel Port Base Address Register
EPP ENABLED
Table 106 - CR24: UART1 Base Address Register
Table 107 - CR25: UART2 Base Address Register
Table 105 - Parallel Port Addressing Options
ADR7
ADR7
ADR7
Yes
No
DB5
DB5
DB5
DATASHEET
ADR6
ADR6
ADR6
DB4
DB4
DB4
A[1:0] = XXb
A[2:0] = XXXb
ADDRESSING (LOW BITS) DECODE
Page 109 of 137
ADR5
ADR5
ADR5
DB3
DB3
DB3
ADR4
ADR4
ADR4
DB2
DB2
DB2
ADR3
ADR3
ADR3
DB1
DB1
DB1
ADR2
DB0
DB0
DB0
0
0
Rev. 02-16-07

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