FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 16

• Manufacturer Part Number: FDC37N769_07
• Description: 3.3V Super I/O Controller with Infrared Support for Portable Applications
• Manufacturer: SMSC [SMSC Corporation]

Super I/O Registers
Table 3 shows the addresses of the various device blocks of the Super I/O immediately after power up. The base
addresses must be set in the configuration registers before accessing these devices. The base addresses of the FDC,
Serial and Parallel Ports can be moved via the configuration registers.
Host Processor Interface
The host processor communicates with the FDC37N769 using the Super I/O registers.
accomplished through programmed I/O or DMA transfers. All registers are 8 bits wide. All host interface output
buffers are capable of sinking a minimum of 12 mA..
Note 1: Configuration registers can only be modified in the configuration state, refer to section
CONFIGURATION on page 95 for more information. All logical blocks in the FDC37N769 can operate normally in the
Note 2: The base addresses must be set in the configuration registers before accessing the logical device blocks.
FLOPPY DISK CONTROLLER
The Floppy Disk Controller (FDC) provides the interface between a host microprocessor and the floppy disk drives.
The FDC integrates the functions of the Formatter/Controller, Digital Data Separator, Write Precompensation and
Data Rate Selection logic for an IBM XT/AT compatible FDC. The true CMOS 765B core guarantees 100% IBM PC
XT/AT compatibility in addition to providing data overflow and underflow protection.
The FDC37N769 is compatible with the 82077AA using SMSC’s proprietary floppy disk controller core.
information about the floppy disk on the Parallel Port pins refer to section Parallel Port Floppy Disk Controller on
page 57.
Modes Of Operation
The FDC37N769 Floppy Disk Controller has two Floppy modes and three Interface modes. Each of the three
Interface modes are available in each of the two Floppy modes.
Floppy Modes
The Floppy modes are used to select alternate configurations for the Tape Drive register. The active Floppy mode is
determined by the Enhanced Floppy Mode 2 bit in Configuration Register 3 (see section CR03 on page 99). When
the Enhanced Floppy Mode 2 bit is 0 Normal Floppy mode is selected, otherwise Enhanced Floppy Mode 2 (OS/2
mode) is selected. See section TAPE DRIVE REGISTER (TDR) on page 22 for the affects of the Enhanced Floppy
Mode 2 bit on the Tape Drive register.
Interface Modes
The Interface modes are determined by the MFM and IDENT configuration bits in Configuration Register 3 (see
section CR03 on page 99).
PC/AT Interface Mode
When both IDENT and MFM are high the PC/AT register set is enabled, the DMA enable bit of the Digital Output
Register becomes valid, FINTR and DRQ can be hi-Z, and TC and DENSEL become active high.
SMSC DS – FDC37N769
Configuration State.
3F0, 3F1 or 370, 371
Base +[0:7]
Base +[0:7]
Base1 +[0:7]
Base2 +[0:7]
Base +[0:3] all modes
Base +[4:7] for EPP
Base +[400:403] for ECP
ADDRESS
FUNCTIONAL DESCRIPTION
DATASHEET
Table 3 - FDC37N769 Block Addresses
Floppy Disk
Serial Port Com 1
Serial Port Com 2
Parallel Port
Configuration
BLOCK NAME
Page 16 of 137
Write only; Note 1
Disabled at power up; Note 2
Disabled at power up; Note 2
Disabled at power up; Note 2
Disabled at power up; Note 2
NOTES
Register access is
Rev. 02-16-07
For