FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 119

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FDC37N769_07

Manufacturer Part Number
FDC37N769_07
Description
3.3V Super I/O Controller with Infrared Support for Portable Applications
Manufacturer
SMSC [SMSC Corporation]
Datasheet
SMSC DS – FDC37N769
nRESET
X1K
t1
t2
t1
t2
t4
Clock CycleTime for 14.318MHZ
Clock High Time/Low Time for
14.318MHZ
Clock Cycle Time for 32KHZ
Clock High Time/Low Time for 32KHz
Clock Rise Time/Fall Time (not shown)
nRESET Low Time
The nRESET low time is dependent upon the processor clock. The
nRESET must be active for a minimum of 24 x16MHz clock cycles.
Parameter
DATASHEET
FIGURE 7 - CLOCK TIMING
Page 119 of 137
t1
t4
t2
1.5
min
31.25
16.53
typ
70
35
t2
max
65
5
units
ns
ns
us
us
ns
us
Rev. 02-16-07

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