FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 4

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FDC37N769_07

Manufacturer Part Number
FDC37N769_07
Description
3.3V Super I/O Controller with Infrared Support for Portable Applications
Manufacturer
SMSC [SMSC Corporation]
Datasheet
P
SERIAL PORT (UART) ..................................................................................................................... 58
R
FIFO I
FIFO P
N
INFRARED INTERFACE ................................................................................................................. 71
I
C
H
IR H
PARALLEL PORT ............................................................................................................................. 74
IBM XT/AT COMPATIBLE, BI-DIRECTIONAL AND EPP MODES .............................................. 75
EPP 1.9 OPERATION ........................................................................................................................... 77
EPP 1.7 OPERATION ........................................................................................................................... 79
EXTENDED CAPABILITIES PARALLEL PORT .............................................................................. 81
SMSC DS – FDC37N769
R
ARALLEL
EGISTER
ONSUMER
OTES
ARDWARE
DA SIR/FIR
Relative Seek...................................................................................................................................... 54
Perpendicular Mode.......................................................................................................................... 55
LOCK................................................................................................................................................. 56
ENHANCED DUMPREG.................................................................................................................. 56
RECEIVE BUFFER REGISTER (RB) ............................................................................................... 59
TRANSMIT BUFFER REGISTER (TB) ............................................................................................. 59
INTERRUPT ENABLE REGISTER (IER) ......................................................................................... 59
INTERRUPT IDENTIFICATION REGISTER (IIR) .......................................................................... 59
FIFO CONTROL REGISTER (FCR)................................................................................................. 61
LINE CONTROL REGISTER (LCR).............................................................................................. 61
MODEM CONTROL REGISTER (MCR) .......................................................................................... 63
LINE STATUS REGISTER (LSR) ...................................................................................................... 64
MODEM STATUS REGISTER (MSR)............................................................................................... 65
SCRATCHPAD REGISTER (SCR) .................................................................................................... 66
PROGRAMMABLE BAUD RATE GENERATOR DIVISOR LATCHES ........................................... 66
The Affects of RESET on the UART Registers ................................................................................... 68
GENERAL.......................................................................................................................................... 71
TX AND RX FIFO OPERATION....................................................................................................... 71
DATA PORT ...................................................................................................................................... 75
STATUS PORT .................................................................................................................................. 75
CONTROL PORT .............................................................................................................................. 76
EPP ADDRESS PORT....................................................................................................................... 77
EPP DATA PORT 0........................................................................................................................... 77
EPP DATA PORT 1........................................................................................................................... 77
EPP DATA PORT 2........................................................................................................................... 77
EPP DATA PORT 3........................................................................................................................... 77
Software Constraints ......................................................................................................................... 78
EPP 1.9 Write.................................................................................................................................... 78
EPP 1.9 Read .................................................................................................................................... 78
Software Constraints ......................................................................................................................... 79
EPP 1.7 Write.................................................................................................................................... 79
EPP 1.7 Read .................................................................................................................................... 79
Vocabulary ........................................................................................................................................ 81
ISA IMPLEMENTATION STANDARD ............................................................................................. 82
Description ........................................................................................................................................ 82
Register Definitions ........................................................................................................................... 83
OPERATION ..................................................................................................................................... 88
ALF
NTERRUPT
OLLED
O
N
D
D
UPLEX
P
S
IR ........................................................................................................................................ 72
ESCRIPTION
ORT
ERIAL
I
NTERFACE
M
AND
ODE
F
M
T
LOPPY
P
URNAROUND
ODE
ASKIR ................................................................................................................... 72
ORT
O
PERATION
.......................................................................................................................... 72
......................................................................................................................... 58
O
FIFO M
D
PERATION
ISK
C
ONTROLLER
D
ODE
........................................................................................................... 69
ELAY
...................................................................................................... 68
O
PERATION
T
IME
DATASHEET
......................................................................................... 57
....................................................................................... 72
................................................................................. 71
Page 4 of 137
Rev. 02-16-07

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