FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 13

• Manufacturer Part Number: FDC37N769_07
• Description: 3.3V Super I/O Controller with Infrared Support for Portable Applications
• Manufacturer: SMSC [SMSC Corporation]

Note 1: nRI and the UART interrupts are active when PWRGD is active and the UARTS are either fully powered or in
Note 2: The FDD output pins multiplexed in the PARALLEL PORT INTERFACE are OD drivers only and are not affected
Note 3: Active (push-pull) output drivers are required on these pins in the enhanced parallel port
Note 4: An external pull-up must be provided for IOCHRDY.
Note 5: The pull-down on this pin is always active including when the output driver is tristated and regardless of the state
SMSC DS – FDC37N769
modes.
TQFP
PIN #
13,70
65,93
4,45,
18
23
24
92
21
56
96
AUTOPOWER DOWN mode.
by the FDD Output Driver Controls (see section CR05 on page 101).
of PWRGD.
14.318
MHz Input
Clock
IR Receive
2
IR Transmit
2
(Note
Drive 2/
Address X/
Interrupt
Request B
IR Mode/ IR
Receive 3
Power
Good/
nGame
Port Chip
Select
External
Interrupt
Input
Power
Ground
NAME
5
)
CLK14
IRRX2
IRTX2
DRV2
nADRX
IRQ_B
IRMODE
IRR3
PWRGD
nGAMECS
IRQIN
VCC
GND
SYMBOL
DATASHEET
ALTERNATE IR PINS/MISC
BUFFER
I/OD12/
O12PD
OD12)
TYPE
(O12/
O6/IS
ICLK
I/O4
POWER INTERFACE
IS
IS
Page 13 of 137
The external connection to a single source 14.318
MHz clock.
IR Receive input
IR transmit output
In PS/2 mode, this input indicates whether a second
drive is connected; DRV2 should be low if a second
drive is connected. This status is reflected in a read
of Status Register A.
Active low address decode out: used to decode a 1,
8, or 16 byte address block. (An external pull-up is
required). Refer to Configuration registers CR03,
CR08 and CR09 for more information.
The interrupt request from a logical device or IRQIN
may be output on IRQ_B. Refer to the configuration
registers for more information. If EPP or ECP Mode
is enabled, this output is pulsed low and released to
allow sharing of interrupts.
IR mode
IR Receive 3
This active high input indicates that the power (VCC)
is valid.
active.
disconnected and put into a low power mode; all
outputs are put into high impedance. The contents af
all registers are preserved as long as VCC is valid.
The
inactive mode drops to I
This is the Game Port Chip Select output - active low.
It will go active when the I/O address, qualified by
AEN, matches that selected in Configuration register
CR1E.
This pin is used to steer an interrupt signal from an
external device onto one of eight IRQ outputs IRQA-
H.
Positive Supply Voltage.
Ground Supply.
output driver current drain when PWRGD is
When PWRGD is inactive, all inputs are
For device operation PWRGD must be
DESCRIPTION
STBY
- standby current.
Rev. 02-16-07