MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 124

• Manufacturer Part Number: MC68HC908AB32
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
8.7 Low-Power Modes
8.7.1 Wait Mode
Technical Data
124
Executing the STOP or WAIT instruction puts the MCU in a low-power-
consumption mode for standby situations. The SIM holds the CPU in a
non-clocked state. The operation of each of these modes is described
below. Both STOP and WAIT clear the interrupt mask (I) in the condition
code register, allowing interrupts to occur.
In wait mode, the CPU clocks are inactive while the peripheral clocks
continue to run.
A module that is active during wait mode can wake up the CPU with an
interrupt if the interrupt is enabled. Stacking for the interrupt begins one
cycle after the WAIT instruction during which the interrupt occurred. In
wait mode, the CPU clocks are inactive. Refer to the wait mode
subsection of each module to see if the module is active or inactive in
wait mode. Some modules can be programmed to be active in wait
mode.
wait mode can also be exited by a reset or break. A break interrupt
during wait mode sets the SIM break STOP/WAIT bit, SBSW, in the SIM
break status register (SBSR). If the COP disable bit, COPD, in the
configuration register 1 (CONFIG1) is 0, then the computer operating
properly (COP) module is enabled and remains active in wait mode.
Figure 8-13
Freescale Semiconductor, Inc.
R/W
IDB
IAB
For More Information On This Product,
NOTE: Previous data can be operand data or the WAIT opcode, depending on the
System Integration Module (SIM)
last instruction.
WAIT ADDR
Go to: www.freescale.com
and
Figure 8-12. Wait Mode Entry Timing
Figure 8-12
PREVIOUS DATA
Figure 8-14
WAIT ADDR + 1
shows the timing for wait mode entry.
show the timing for wait recovery.
NEXT OPCODE
SAME
MC68HC908AB32
SAME
SAME
SAME
MOTOROLA
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Rev. 1.0