MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 317

• Manufacturer Part Number: MC68HC908AB32
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

MC68HC908AB32
MOTOROLA
NOTE:
—
Rev. 1.0
DDRA[7:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
the port A I/O logic.
When DDRAx is a logic 1, reading address $0000 reads the PTAx data
latch. When DDRAx is a logic 0, reading address $0000 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 17-2
Notes:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRA
These read/write bits control port A data direction. Reset clears
DDRA[7:0], configuring all port A pins as inputs.
Freescale Semiconductor, Inc.
Bit
0
1
For More Information On This Product,
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
PTA Bit
X
summarizes the operation of the port A pins.
X
(1)
Go to: www.freescale.com
Input/Output (I/O) Ports
Table 17-2. Port A Pin Functions
Input, Hi-Z
I/O Pin Mode
Figure 17-4. Port A I/O Circuit
RESET
Output
(2)
Accesses to DDRA
DDRAx
PTAx
Read/Write
DDRA[7:0]
DDRA[7:0]
PTA[7:0]
Figure 17-4
Input/Output (I/O) Ports
Read
Pin
Accesses to PTA
Technical Data
PTA[7:0]
PTA[7:0]
shows
Write
Port A
PTAx
317
(3)