MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 354

• Manufacturer Part Number: MC68HC908AB32
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

Computer Operating Properly (COP)
20.3 Functional Description
Technical Data
354
INTERNAL RESET SOURCES
(COPRS FROM CONFIG1)
(COPD FROM CONFIG1)
RESET VECTOR FETCH
STOP INSTRUCTION
COPEN (FROM SIM)
NOTE:
COP RATE SEL
COPCTL WRITE
COPCTL WRITE
COP DISABLE
CGMXCLK
RESET
Figure 20-1
The COP counter is a free-running 6-bit counter preceded by a 12-bit
prescaler counter. If not cleared by software, the COP counter overflows
and generates an asynchronous reset after 2
CGMXCLK cycles, depending on the state of the COP rate select bit,
COPRS, in configuration register 1. With a 2
overflow option, a 4.9152MHz crystal gives a COP timeout period of
53.3ms. Writing any value to location $FFFF before an overflow occurs
prevents a COP reset by clearing the COP counter and stages 12
through 5 of the prescaler.
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 20-1. COP Block Diagram
COP MODULE
COP CLOCK
12-BIT COP PRESCALER
Computer Operating Properly (COP)
Go to: www.freescale.com
shows the structure of the COP module.
COP COUNTER
6-BIT COP COUNTER
CLEAR
RESET STATUS REGISTER
18
18
MC68HC908AB32
– 2
RESET CIRCUIT
– 2
4
4
CGMXCLK cycle
or 2
13
– 2
MOTOROLA
4
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Rev. 1.0