MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 252
MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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Serial Communications Interface
15.5.3.3 Data Sampling
Technical Data
252
RT CLOCK
RT CLOCK
SAMPLES
PTE1/RxD
CLOCK
RESET
STATE
RT
The receiver samples the PTE1/RxD pin at the RT clock rate. The RT
clock is an internal signal with a frequency 16 times the baud rate. To
adjust for baud rate mismatch, the RT clock is resynchronized at the
following times (see
To locate the start bit, data recovery logic does an asynchronous search
for a logic 0 preceded by three logic 1s. When the falling edge of a
possible start bit occurs, the RT clock begins to count to 16.
•
•
Freescale Semiconductor, Inc.
QUALIFICATION
Figure 15-6. Receiver Data Sampling
Serial Communications Interface Module (SCI)
For More Information On This Product,
START BIT
After every start bit
After the receiver detects a data bit change from logic 1 to logic 0
(after the majority of data bit samples at RT8, RT9, and RT10
returns a valid logic 1 and the majority of the next RT8, RT9, and
RT10 samples returns a valid logic 0)
Go to: www.freescale.com
VERIFICATION
Figure
START BIT
15-6):
START BIT
SAMPLING
DATA
MC68HC908AB32
LSB
MOTOROLA
—
Rev. 1.0
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