MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 22
MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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List of Figures
Technical Data
22
Figure
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10 Interrupt Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
8-11 Interrupt Recognition Example . . . . . . . . . . . . . . . . . . . . . . . . 121
8-12 Wait Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
8-13 Wait Recovery from Interrupt or Break . . . . . . . . . . . . . . . . . . 125
8-14 Wait Recovery from Internal Reset. . . . . . . . . . . . . . . . . . . . . 125
8-15 Stop Mode Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
8-16 Stop Mode Recovery from Interrupt or Break . . . . . . . . . . . . . 126
8-17 SIM Break Status Register (SBSR) . . . . . . . . . . . . . . . . . . . . 127
8-18 SIM Reset Status Register (SRSR) . . . . . . . . . . . . . . . . . . . . 128
8-19 SIM Break Flag Control Register (SBFCR) . . . . . . . . . . . . . . 129
9-1
9-2
9-3
9-4
9-5
9-7
9-8
10-1 Monitor Mode Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
10-2 Monitor Data Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
10-3 Sample Monitor Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 161
10-4 Read Transaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
10-5 Break Transaction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
10-6 Monitor Mode Entry Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 167
11-1 TIMA Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Freescale Semiconductor, Inc.
For More Information On This Product,
SIM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
SIM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . . 112
CGM Clock Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
External Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Internal reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Sources of Internal Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
POR Recovery . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Interrupt Entry Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Interrupt Recovery Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
CGM Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
CGM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . 134
CGM External Connections . . . . . . . . . . . . . . . . . . . . . . . . . . 141
CGM I/O Register Summary. . . . . . . . . . . . . . . . . . . . . . . . . . 144
PLL Control Register (PCTL) . . . . . . . . . . . . . . . . . . . . . . . . . 144
PLL Bandwidth Control Register (PBWC) . . . . . . . . . . . . . . . 146
PLL Programming Register (PPG) . . . . . . . . . . . . . . . . . . . . . 148
Go to: www.freescale.com
List of Figures
Title
MC68HC908AB32
MOTOROLA
—
Rev. 1.0
Page
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