MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 127

• Manufacturer Part Number: MC68HC908AB32
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

8.8 SIM Registers
8.8.1 SIM Break Status Register
MC68HC908AB32
MOTOROLA
—
Rev. 1.0
Note: 1. Writing a logic 0 clears SBSW.
Address:
The SIM has three memory mapped registers.
mapping of these registers.
The SIM break status register (SBSR) contains a flag to indicate that a
break caused an exit from stop or wait mode.
SBSW — SIM Break STOP/WAIT
SBSW can be read within the break state SWI routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example of this.
Reset:
Read:
Write:
This status bit is useful in applications requiring a return to stop or wait
mode after exiting from a break interrupt. SBSW can be cleared by
writing a logic 0 to it. Reset clears SBSW.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Stop or wait mode was exited by break interrupt
0 = Stop or wait mode was not exited by break interrupt
Address
$FE00
$FE01
$FE03
$FE00
Bit 7
R
R
Figure 8-17. SIM Break Status Register (SBSR)
0
System Integration Module (SIM)
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= Reserved
R
6
0
Table 8-4. SIM Registers
R
5
0
Register
SBFCR
SBSR
SRSR
R
4
0
R
3
0
System Integration Module (SIM)
Table 8-4
Access Mode
R
2
0
User
User
User
SBSW
Note
shows the
1
0
Technical Data
SIM Registers
(1)
Bit 0
R
0
127