MC68HC908AB32 MOTOROLA [Motorola, Inc], MC68HC908AB32 Datasheet - Page 129
MC68HC908AB32
Manufacturer Part Number
MC68HC908AB32
Description
HCMOS Microcontroller Unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908AB32.pdf
(392 pages)
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8.8.3 SIM Break Flag Control Register
MC68HC908AB32
MOTOROLA
—
Rev. 1.0
Address:
PIN — External Reset Bit
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit (opcode fetches only)
LVI — Low-Voltage Inhibit Reset Bit
The SIM break control register contains a bit that enables software to
clear status bits while the MCU is in a break state.
BCFE — Break Clear Flag Enable Bit
Reset:
Read:
Write:
This read/write bit enables software to clear status bits by accessing
status registers while the MCU is in a break state. To clear status bits
during the break state, the BCFE bit must be set.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
1 = Last reset caused by COP counter
0 = POR or read of SRSR
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
1 = Status bits clearable during break
0 = Status bits not clearable during break
Figure 8-19. SIM Break Flag Control Register (SBFCR)
$FE03
BCFE
Bit 7
R
0
System Integration Module (SIM)
Go to: www.freescale.com
= Reserved
R
6
R
5
R
4
R
3
System Integration Module (SIM)
R
2
R
1
Technical Data
SIM Registers
Bit 0
R
129
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