MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 160
MC68HC908JK3EMP
Manufacturer Part Number
MC68HC908JK3EMP
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JK3EMP.pdf
(226 pages)
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Input/Output (I/O) Ports
12.4.2 Data Direction Register B (DDRB)
Technical Data
160
NOTE:
Address:
ADC[7:0] — ADC channels 7 to 0
Data direction register B determines whether each port B pin is an input
or an output. Writing a logic one to a DDRB bit enables the output buffer
for the corresponding port B pin; a logic zero disables the output buffer.
DDRB[7:0] — Data Direction Register B Bits
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
the port B I/O logic.
Reset:
Read:
Write:
ADC[7:0] are pins used for the input channels to the analog-to-digital
converter module. The channel select bits, ADCH[4:0], in the ADC
status and control register define which port pin will be used as an
ADC input and overrides any control from the port I/O logic. See
Section 11. Analog-to-Digital Converter
These read/write bits control port B data direction. Reset clears
DDRB[7:0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
DDRB7
$0005
Bit 7
0
Figure 12-7. Data Direction Register B (DDRB)
Input/Output (I/O) Ports
DDRB6
6
0
DDRB5
5
0
DDRB4
4
0
MC68H(R)C908JL3E/JK3E/JK1E
DDRB3
3
0
(ADC).
DDRB2
2
0
Figure 12-8
DDRB1
1
0
MOTOROLA
—
shows
Rev. 2.0
DDRB0
Bit 0
0
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