MC68HC908JK3EMP MOTOROLA [Motorola, Inc], MC68HC908JK3EMP Datasheet - Page 78

• Manufacturer Part Number: MC68HC908JK3EMP
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

System Integration Module (SIM)
7.2 Introduction
Technical Data
78
7.7
7.7.1
7.7.2
7.8
7.8.1
7.8.2
7.8.3
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. Together with the
CPU, the SIM controls all MCU activities. A block diagram of the SIM is
shown in
The SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
•
•
•
•
•
Bus clock generation and control for CPU and peripherals
– Stop/wait/reset/break entry and recovery
– Internal clock control
Master reset control, including power-on reset (POR) and COP
timeout
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
CPU enable/disable timing
Modular architecture expandable to 128 interrupt sources
Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .94
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Break Status Register (BSR) . . . . . . . . . . . . . . . . . . . . . . . . 97
Reset Status Register (RSR) . . . . . . . . . . . . . . . . . . . . . . . . 98
Break Flag Control Register (BFCR) . . . . . . . . . . . . . . . . . 100
Figure
System Integration Module (SIM)
7-1.
Figure 7-2
is a summary of the SIM I/O registers.
MC68H(R)C908JL3E/JK3E/JK1E
MOTOROLA
—
Rev. 2.0