PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 114

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Data Sheet
Register 3
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
GPI
DMI
Bit
GPI
7
General Purpose Port Indication
This bit indicates, that a GPP port interrupt indication is pending:
GPI=’0’
GPI=’1’
DMA Interrupt Indication
This bit indicates, that a DMA interrupt indication is pending:
DMI=’0’
DMI=’1’
GSTAR
Global Status Register
DMI
6
read only
00
03
written by SEROCCO-H evaluated by CPU
H
H
No general purpose port interrupt indication is pending.
General purpose port interrupt indication is pending. The
source for this interrupt can be further determined by
reading registers
No DMA interrupt indication is pending.
DMA interrupt indication is pending. The source for this
interrupt (channel A/B, receive/transmit) can be further
determined by reading register
125).
ISA2
5
Global Interrupt Status Information
ISA1
5-114
4
GPISL/GPISH
ISA0
3
Register Description (GSTAR)
ISB2
DISR
2
(refer to page 5-122).
(refer to page 5-
ISB1
1
PEB 20525
PEF 20525
2000-09-14
ISB0
0
(-)
(-)