PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 122

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Data Sheet
Register 10
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 11
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
7
7
0
0
GPISL
GPP Interrupt Status Register (Low Byte)
GPISH
GPP Interrupt Status Register (High Byte)
GP6I
6
6
0
read only
00
0A
written by SEROCCO-H, read and evaluated by CPU
read only
00
0B
written by SEROCCO-H, read and evaluated by CPU
H
H
H
H
5
5
0
0
GPP Interrupt Status Bits
GPP Interrupt Status Bits
5-122
4
4
0
0
3
3
0
0
Register Description (GPISL)
GP10I
GP2I
2
2
GP9I
GP1I
1
1
PEB 20525
PEF 20525
2000-09-14
GP8I
GP0I
0
0