PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 34

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PEF20525

Manufacturer Part Number
PEF20525
Description
2 Channel Serial Optimized Communication Controller for HDLC/PPP
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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0
Table 2
Pin No.
P-
LFBGA-
80-2
D5
C7
C6
Data Sheet
P-TQFP-
100-3
88
87
89
External DMA Interface
Symbol In (I)
DRTB
GP0
DRRB
GP1
DACKB
GP2
Out (O)
O
I/O
O
I/O
I
I/O
Function
DMA Request Transmitter Channel B
(corresponding to channel A)
General Purpose Pin #0
If DMA support is not enabled, this pin serves as
a general pupose input/output pin.
After reset this pin serves as a general purpose
input. A pull-up resistor to V
DMA Request Receiver Channel B
(corresponding to channel A)
General Purpose Pin #1
If DMA support is not enabled, this pin serves as
a general pupose input/output pin.
After reset this pin serves as a general purpose
input. A pull-up resistor to V
DMA Acknowledge Channel B
(corresponding to channel A)
General Purpose Pin #2
If DMA support is not enabled, this pin serves as
a general pupose input/output pin.
A pull-up resistor to V
pin is not used.
34
DD3
is recommended if this
DD3
DD3
is recommended.
is recommended.
Pin Descriptions
PEB 20525
PEF 20525
2000-09-14

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