PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 30

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 1
Pin No.
P-
LFBGA-
80-2
G6
J9
J7
H7
Data Sheet
P-TQFP-
100-3
44
52
45
43
Microprocessor Bus Interface
Symbol In (I)
DS
BHE
LDS
RD
R/W
CS
Out (O)
I
I
I
I
I
I
Function
Data Strobe (8-bit Motorola bus mode only)
This active low strobe signal serves to control
read/write operations.
Bus High Enable (16-bit Intel bus mode only)
This signal indicates a data transfer on the upper
byte of the data bus (D15..D8). In 8-bit Intel bus
mode this signal has no function.
Lower Data Strobe (16-bit Motorola bus mode)
This active low strobe signal serves to control
read/write operations. Together with signal UDS
the type of bus access is determined (byte or word
access at even or odd address).
In 8-bit Intel bus mode, a pull-up resistor to V
is recommended on this pin.
Read Strobe (Intel bus mode only)
This signal indicates a read operation. The current
bus master is able to accept data on lines D(7:0) /
D(15:0) during an active RD signal.
In Motorola bus mode, a pull-up resistor to V
recommended on this pin.
Read/Write Enable (Motorola bus mode)
This signal distinguishes between read and write
operation. As an input it must be valid during data
strobe (DS).
In Intel bus mode, a pull-up resistor to V
recommended on this pin.
Chip Select
A low signal selects SEROCCO-H for read/write
operations.
30
Pin Descriptions
PEB 20525
PEF 20525
2000-09-14
DD3
DD3
is
DD3
is