PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 120

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Data Sheet
Register 8
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 9
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
7
7
0
1
GP6IM
GPIML
GPP Interrupt Mask Register (Low Byte)
GPIMH
GPP Interrupt Mask Register (High Byte)
6
6
0
read/write
07
08
written by CPU, evaluated by SEROCCO-H
read/write
FF
09
written by CPU, evaluated by SEROCCO-H
H
H
H
H
5
5
0
1
GPP Interrupt Mask Bits
GPP Interrupt Mask Bits
5-120
4
4
0
1
3
3
0
1
Register Description (GPIML)
GP10IM
GP2IM
2
2
GP9IM
GP1IM
1
1
PEB 20525
PEF 20525
2000-09-14
GP8IM
GP0IM
0
0