PEF20525 INFINEON [Infineon Technologies AG], PEF20525 Datasheet - Page 208

• Manufacturer Part Number: PEF20525
• Description: 2 Channel Serial Optimized Communication Controller for HDLC/PPP
• Manufacturer: INFINEON [Infineon Technologies AG]

Data Sheet
Register 81
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 82
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
RE
15
7
DRMBS
RMBSL
Receive Maximum Buffer Size (Low Byte)
RMBSH
Receive Maximum Buffer Size (High Byte)
14
6
written by CPU, evaluated by SEROCCO-H
written by CPU, evaluated by SEROCCO-H
read/write
00
Channel A
C4
read/write
00
Channel A
C5
H
H
H
H
13
5
0
Receive Maximum Buffer Size
Receive Maximum Buffer Size
Channel B
DE
Channel B
DF
H
H
12
5-208
4
0
RMBS(7:0)
11
3
Register Description (RMBSL)
10
2
RMBS(11:8)
1
9
PEB 20525
PEF 20525
2000-09-14
0
8