MC9RS08KA1 FREESCALE [Freescale Semiconductor, Inc], MC9RS08KA1 Datasheet - Page 63

• Manufacturer Part Number: MC9RS08KA1
• Description: RS08 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

8.3.5
SRT addressing mode is capable of addressing only the first 32 bytes in the address map, from $0000 to
$001F. This addressing mode is available for CLR, LDA, and STA instructions. A system can be optimized
by placing the most computation-intensive data in this area of memory.
Because the 5-bit address is embedded in the opcode, only the least significant five bits of the address must
be included in the instruction; this saves program space and execution time. During execution, the CPU
adds nine high-order 0s to the 5-bit operand address and uses the combined 14-bit address ($000x or
$001x) to access the intended operand.
8.3.6
DIR addressing mode is used to access operands located in direct address space ($0000 through $00FF).
During execution, the CPU adds six high-order 0s to the low byte of the direct address operand that follows
the opcode. The CPU uses the combined 14-bit address ($00xx) to access the intended operand.
8.3.7
In the extended addressing mode, the 14-bit address of the operand is included in the object code in the
low-order 14 bits of the next two bytes after the opcode. This addressing mode is only used in JSR and
JMP instructions for jump destination address in RS08 MCUs.
8.3.8
Indexed addressing mode is sometimes called indirect addressing mode because an index register is used
as a reference to access the intended operand.
An important feature of indexed addressing mode is that the operand address is computed during execution
based on the current contents of the X index register located in $000F of the memory map rather than being
a constant address location that was determined during program assembly. This allows writing of a
program that accesses different operand locations depending on the results of earlier program instructions
(rather than accessing a location that was determined when the program was written).
The index addressing mode supported by the RS08 Family uses the register X located at $000F as an index
and D[X] register located at $000E as the indexed data register. By programming the index register X, any
location in the direct page can be read/written via the indexed data register D[X].
These pseudo instructions can be used with all instructions supporting direct, short, and tiny addressing
modes by using the D[X] as the operand.
8.4
Most of what the CPU does is described by the instruction set, but a few special operations must be
considered, such as how the CPU starts at the beginning of an application program after power is first
applied. After the program begins running, the current instruction normally determines what the CPU will
do next. Two exceptional events can cause the CPU to temporarily suspend normal program execution:
Freescale Semiconductor
Special Operations
Short Addressing Mode (SRT)
Direct Addressing Mode (DIR)
Extended Addressing Mode (EXT)
Indexed Addressing Mode (IX, Implemented by Pseudo Instructions)
MC9RS08KA2 Series Data Sheet, Rev. 3
Chapter 8 Central Processor Unit (RS08CPUV1)
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