MC9RS08KA1 FREESCALE [Freescale Semiconductor, Inc], MC9RS08KA1 Datasheet - Page 99
MC9RS08KA1
Manufacturer Part Number
MC9RS08KA1
Description
RS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheets
1.MC9RS08KA2.pdf
(136 pages)
2.MC9RS08KA1.pdf
(136 pages)
3.MC9RS08KA1.pdf
(132 pages)
4.MC9RS08KA1.pdf
(132 pages)
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Chapter 12 Development Support
BDC CLOCK
(TARGET MCU)
HOST DRIVE
HIGH IMPEDANCE
TO BKGD PIN
TARGET MCU
SPEEDUP PULSE
HIGH IMPEDANCE
HIGH IMPEDANCE
PERCEIVED START
OF BIT TIME
R-C RISE
BKGD PIN
10 CYCLES
EARLIEST START
OF NEXT BIT
10 CYCLES
HOST SAMPLES BKGD PIN
Figure 12-4. BDC Target-to-Host Serial Bit Timing (Logic 1)
Figure 12-5
shows the host receiving a logic 0 from the target MCU. Because the host is asynchronous to
the target, there is a 0-to-1 cycle delay from the host-generated falling edge on BKGD to the start of the
bit time as perceived by the target. The host initiates the bit time but the target finishes it. Because the target
wants the host to receive a logic 0, it drives the BKGD pin low for 13 BDC clock cycles, then briefly drives
it high to speed up the rising edge. The host samples the bit level approximately 10 cycles after starting the
bit time.
MC9RS08KA2 Series Data Sheet, Rev. 3
Freescale Semiconductor
99