MC9RS08KA1 FREESCALE [Freescale Semiconductor, Inc], MC9RS08KA1 Datasheet - Page 78
MC9RS08KA1
Manufacturer Part Number
MC9RS08KA1
Description
RS08 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheets
1.MC9RS08KA2.pdf
(136 pages)
2.MC9RS08KA1.pdf
(136 pages)
3.MC9RS08KA1.pdf
(132 pages)
4.MC9RS08KA1.pdf
(132 pages)
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Chapter 9 Internal Clock Source (RS08ICSV1)
9.4.4
9.5
9.5.1
The states of the ICS are shown as a state diagram and are described in this section. The arrows indicate
the allowed movements between the states.
78
CLKST
FTRIM
Field
2
0
Reset:
POR:
Functional Description
W
R
1
2
was active before MCU entered stop, unless a reset occurs while in stop.
ICS enters its Stop state when MCU enters stop, FLL is always disabled. ICS returns to the state that
If IREFSTEN is set when MCU enters stop, the ICSIRCLK remains running.
ICS Status and Control (ICSSC)
Operational Modes
Clock Mode Status — The CLKST read-only bit indicate the current clock mode. The CLKST bit does not update
immediately after a write to the CLKS bit due to internal synchronization between clock domains.
0 Output of FLL is selected
1 Internal reference clock is selected
ICS Fine Trim — The FTRIM bit controls the smallest adjustment of the internal reference clock frequency.
Setting FTRIM will increase the period and clearing FTRIM will decrease the period by the smallest amount
possible.
FLL Engaged
Internal (FEI)
CLKS=0
7
0
0
0
= Unimplemented
Figure 9-6. ICS Status and Control Register (ICSSC)
0
0
0
6
MC9RS08KA2 Series Data Sheet, Rev. 3
Table 9-5. ICSSC Field Descriptions
Figure 9-7. Clock Switching Modes
0
0
0
5
FLL Bypassed
Internal (FBI)
CLKS=1
LP=0
Stop
0
0
0
4
Description
1, 2
0
0
0
3
CLKST
0
0
2
FLL Bypassed
Internal Low
Power(FBILP)
CLKS=1
LP=1
Freescale Semiconductor
0
0
0
1
FTRIM
U
0
0