LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 119
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LM3S328-IQC20-A0
Manufacturer Part Number
LM3S328-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S328-IQC20-A0.pdf
(371 pages)
- Current page: 119 of 371
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Table 8-3. GPIO Register Map (Continued)
a. The default reset value for the GPIOAFSEL register is 0x00000000 for all GPIO pins, with the exception of the five JTAG pins
8.5
April 27, 2007
0xFDC
0xFEC
0xFFC
Offset
0xFD4
0xFD8
0xFE0
0xFE4
0xFE8
0xFF0
0xFF4
0xFF8
(PB7 and PC[3:0]. These five pins default to JTAG functionality. Because of this, the default reset value of GPIOAFSEL for
GPIO Port B is 0x00000080 while the default reset value of GPIOAFSEL for Port C is 0x0000000F.
Name
GPIOPeriphID5
GPIOPeriphID6
GPIOPeriphID7
GPIOPeriphID0
GPIOPeriphID1
GPIOPeriphID2
GPIOPeriphID3
GPIOPCellID0
GPIOPCellID1
GPIOPCellID2
GPIOPCellID3
Register Descriptions
The remainder of this section lists and describes the GPIO registers, in numerical order by
address offset.
0x0000000D
0x000000F0
0x000000B1
0x00000000
0x00000000
0x00000000
0x00000061
0x00000000
0x00000018
0x00000001
0x00000005
Reset
Type
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Preliminary
Description
Peripheral identification 5
Peripheral identification 6
Peripheral identification 7
Peripheral identification 0
Peripheral identification 1
Peripheral identification 2
Peripheral identification 3
GPIO PrimeCell identification 0
GPIO PrimeCell identification 1
GPIO PrimeCell identification 2
GPIO PrimeCell identification 3
LM3S328 Data Sheet
page
See
139
140
141
142
143
144
145
146
147
148
149
119
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