LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 335

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LM3S328-IQC20-A0

Manufacturer Part Number
LM3S328-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
April 27, 2007
Reset
Reset
Type
Type
Bit/Field
I2C Slave Data (I2CSDR)
Offset 0x008
31:8
7:0
RO
RO
31
15
0
0
Register 12: I
This register contains the data to be transmitted when in the Slave Transmit state, and the data
received when in the Slave Receive state.
RO
RO
30
14
0
0
reserved
RO
RO
Name
29
13
DATA
0
0
RO
RO
28
12
2
0
0
C Slave Data (I2CSDR), offset 0x008
reserved
RO
RO
27
11
0
0
Type
R/W
RO
RO
RO
26
10
0
0
RO
RO
25
0
9
0
Reset
Preliminary
0x0
0
RO
RO
24
0
8
0
reserved
Description
Reserved bits return an indeterminate value, and should
never be changed.
This field contains the data for transfer during a slave
receive or transmit operation.
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
DATA
R/W
RO
19
0
3
0
LM3S328 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
335

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