LM3S328-IQC20-A0 ETC2 [List of Unclassifed Manufacturers], LM3S328-IQC20-A0 Datasheet - Page 178
![no-image](/images/no-image-200.jpg)
LM3S328-IQC20-A0
Manufacturer Part Number
LM3S328-IQC20-A0
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S328-IQC20-A0.pdf
(371 pages)
- Current page: 178 of 371
- Download datasheet (3Mb)
General-Purpose Timers
178
Reset
Reset
Type
Type
Bit/Field
31:8
GPTM TimerA Prescale Match (GPTMTAPMR)
Offset 0x040
7:0
RO
RO
31
15
0
0
Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040
This register effectively extends the range of GPTMTAMATCHR to 24 bits.
RO
RO
30
14
0
0
TAPSMR
reserved
Name
RO
RO
29
13
0
0
reserved
RO
RO
28
12
0
0
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
GPTM TimerA Prescale Match
This value is used alongside GPTMTAMATCHR to detect timer
match events while using a prescaler.
RO
RO
24
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
TAPSMR
R/W
RO
19
0
3
0
R/W
RO
18
0
2
0
April 27, 2007
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0
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