AM29PDL128G70 SPANSION [SPANSION], AM29PDL128G70 Datasheet - Page 42

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AM29PDL128G70

Manufacturer Part Number
AM29PDL128G70
Description
128 Megabit (8 M x 16-Bit/4 M x 32-Bit) CMOS 3.0 Volt-only, Simultaneous Read/ Write Flash Memory with VersatileIO Control
Manufacturer
SPANSION [SPANSION]
Datasheet
Command Definitions Tables
Legend:
BA = Address of bank switching to autoselect mode, bypass mode, or
erase operation. Determined by A21:A19, see Tables
more detail.
PA = Program Address (A21:A0). Addresses latch on falling edge of
WE# or CE# pulse, whichever happens later.
PD = Program Data (DQ15:DQ0) written to location PA. Data latches
on rising edge of WE# or CE# pulse, whichever happens first.
Notes:
1.
2. All values are in hexadecimal.
3. Shaded cells in table denote read cycles. All other cycles are
4. During unlock and command cycles, when lower address bits are
5. No unlock or command cycles required when bank is reading
6. Reset command is required to return to reading array (or to
7. Cycle 4 of autoselect command sequence is a read cycle. See
8. The data is 80h for factory locked and 00h for not factory locked.
July 29, 2002
Command (Notes)
Read (5)
Reset (6)
Autoselect
(Note 7)
Program
Chip Erase
Sector Erase
Program/Erase Suspend (11)
Program/Erase Resume (12)
CFI Query (13)
Accelerated Program (15)
Configuration Register Verify
Configuration Register Write (16)
Unlock Bypass Entry (17)
Unlock Bypass Program (17)
Unlock Bypass Erase (17)
Unlock Bypass CFI (13, 17)
Unlock Bypass Reset (17)
See
write operations.
555 or 2AAh as shown in table, address bits higher than A11
(except where BA is required) and data bits higher than DQ7 are
don’t cares.
array data.
erase-suspend-read mode if previously in Erase Suspend) when
bank is in autoselect mode, or if DQ5 goes high (while bank is
providing status information).
Autoselect Command Sequence section for more information.
Table 1
for description of bus operations.
Manufacturer ID
Device ID (10)
SecSi Sector
Factory Protect
Sector Group
Protect Verify (9)
Table 14. Memory Array Command Definitions (x32 Mode)
1
1
4
6
4
4
4
6
6
1
1
1
2
4
4
3
2
2
1
2
Addr Data Addr Data Addr Data
XXX
555
555
555
555
555
555
555
555
555
555
RA
BA
BA
XX
XX
XX
XX
XX
55
4
P R E L I M I N A R Y
and
RD
AA
AA
AA
AA
AA
AA
AA
B0
A0
AA
AA
AA
A0
F0
30
98
80
98
90
5
for
Am29PDL128G
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
XX
XX
PA
PA
PD
PD
55
55
55
55
55
55
55
55
55
55
10
00
RA = Read Address (A21:A0).
RD = Read Data (DQ15:DQ0) from location RA.
SA = Sector Address (A21:A12) for verifying (in autoselect mode) or
erasing.
WD = Write Data. See “Configuration Register” definition for specific
write data. Data latched on rising edge of WE#.
X = Don’t care
9. The data is 00h for an unprotected sector group and 01h for a
10. Device ID must be read across cycles 4, 5, and 6.
11. System may read and program in non-erasing sectors, or enter
12. Program/Erase Resume command valid only during Erase
13. Command valid when device is ready to read array data or when
14. ACC must be at V
15. Command is ignored during any Embedded Program, Embedded
16. Unlock Bypass Entry command is required prior to any Unlock
(BA)5
555
555
555
555
555
555
555
555
555
55
protected sector group.
autoselect mode, when in Program/Erase Suspend mode.
Program/Erase Suspend command is valid only during a sector
erase operation, and requires bank address.
Suspend mode, and requires bank address.
device is in autoselect mode.
Erase, or Suspend operation.
Bypass operation. Unlock Bypass Reset command is required to
return to reading array.
Bus Cycles (Notes 1–4)
C6
D0
90
90
90
90
90
80
80
20
(BA)X00
(BA)X01
(BA)XX
SA02
Addr
X03
555
555
XX
PA
ID
during entire operation of command.
Note 8)
XX00/
XX01
Data
(see
WD
PD
RD
7E
AA
AA
01
(BA)X0E
Addr
2AA
2AA
Data
0D
55
55
(BA)X0F
Addr
555
SA
Data
00
10
30
41

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