SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 117

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

DATA SHEET
3.4. SFR Register Description
Note: For compatibility reasons every undefined bit in
Table 3–4: SFR register description
Micronas
Name
P0
P0[7:0]
P1
P1[7:0]
P2
P2[7:0]
P3
P3[7:0]
P4
P4[7:0]
SP
SP_[7:0]
DPL
DPL[7:0]
DPH
DPH[7:0]
DPSEL
DPSEL[2:0]
PCON
SMOD
PDS
a writeable register should be set to ’0’. Unde-
fined bits in a readable register should be
treated as “don’t care”!
Sub
h80
h80[7:0]
h90
h90[7:0]
hA0
hA0[7:0]
hB0
hB0[7:0]
hE8
hE8[7:0]
h81
h81[7:0]
h82
h82[7:0]
h83
h83[7:0]
h84
h84[2:0]
h87
h87[7]
h87[6]
Dir
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Reset
hFF
255
hFF
255
hFF
255
hFF
255
255
h07
7
h00
0
h00
0
h00
0
h00
0
0
Sept. 10, 2004; 6251-556-3DS
Range
0..255
0..255
0..255
0..255
0..255
0..255
0..255
0..255
0..7
0..1
0..1
MICRO
PORT
Function
Port 0
Port 0
Port 1
Port 1
Port 2
Port 2
Port 3
Port 3
Port 4
Port 4
Stack Pointer
Stack Pointer
Data Pointer Low
Data Pointer low byte
Data Pointer High
Data Pointer high byte
Data Pointer Select
Data Pointer Select
selects one of eight data pointer
Power Control
UART Baud Rate
0: Normal baud rate.
1: Double baud rate.
Power Down Start Bit
0: Power Down Mode not started.
1: Power Down Mode started.
The instruction that sets this bit is the last instruction before entering
power down mode. Additionally, this bit is protected by a delay cycle.
Power down mode is entered, if and only if bit PDE was set by the pre-
vious instruction. Once set, this bit is cleared by hardware and always
reads out a 0.
DAC, PLL and Oscillator are switched off during Power Down.
The CADC is completely switched off (no wake up possible).
SDA 55xx
117