SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 142

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
Table 3–8: ACQ register description, continued
142
Name
FC1ER
VCR
ACQLP3
MLENGTH[7:5]
ALENGTH[4:3]
CLKDIV[2:0]
Addr
h000F[2]
h000F[1]
h0010
h0010[7:5]
h0010[4:3]
h0010[2:0]
Dir
RW
RW
RW
RW
RW
RW
Sync
HS
HS
HS
HS
HS
HS
Sept. 10, 2004; 6251-556-3DS
Reset
0
0
h0000
0
0
0
Range
Function
If this bit is ’1’ the FC1 check is performed with one bit error
tolerance.
0:No error tolerance for FC1-check
1:One bit error tolerance for FC1-check
This bit is used to change the behavior of the D-PLL.
(corresponds to slicer 1)
0:D-PLL tuning is stopped after CRI.
1:D-PLL is tuned throughout the line.
For noise suppression reasons a median filter has been
introduced after the actual data separation. Because of
over sampling successive samples could be averaged.
Therefore an odd number of sliced successive samples is
taken and if the majority are ‘1’ a ‘1’ is sliced otherwise a
‘0’. MLENGTH specifies how many samples are taken.
(Corresponds to slicer 1)
MLENGTHNumber of samples
0001
0013
0105
0117
1009
10111
11013
11115
If noise has been detected or if NOISEON = 1 the output of
the slicing level filter is further averaged by means of an
accumulation (arithmetic averaging). ALENGTH specifies
the number of slicing level filter output values used for
averaging. The accumulation clock depends on CLKDIV.
ALENGTHNumber of Slicing Level Output
Values used for Averaging
002
014
108
1116
The slicing level filter needs to find the DC value of the
CVBS during CRI. In order to do this it should suppress at
least the CRI frequency. As different services use different
data frequencies the CRI frequency will be different as well.
Therefore the filter characteristic needs to be shifted. This
can be done by using different clocks for the filter. The filter
itself shows sufficient suppression for frequencies between
0.0757 × SL
clock and corresponds to slicer 1)
CLKDIVSL
0001 × f
0011/2 × f
0101/3 × f
0111/4 × f
1001/5 × f
1011/6 × f
1101/7 × f
1111/8 × f
Note: f
s
s
= 33.33 MHz
s
s
s
s
s
s
s
CLK
CLK
and 0.13 × SL
CLK
(SL
CLK
is the actual filter
DATA SHEET
Micronas