SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 20

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
2.2.7. Microcontroller
2.2.8. Architecture
Every CPU machine cycle consists of 12 internal CPU
clock periods.
The CPU manipulates operands in two memory
spaces: The program memory space, and the data
memory space. The program memory address space
is provided to accommodate relocatable code.
The data memory address space is divided into the
256-Byte internal data RAM, XRAM (extended data
memory, accessible with MOVX instructions) and the
128-Byte Special Function Register (SFR) address
space.
Four register banks (each bank has eight registers),
128 addressable bits, and the stack reside in the inter-
nal data RAM. The stack depth is limited only by the
available internal data RAM. Its location is determined
by the 8-bit stack pointer. All registers except the pro-
gram counter and the four 8-register banks reside in
the special function register address space.
These memory mapped registers include arithmetic
registers, pointers, I/O-ports, registers for the interrupt
system, timers, pulse width modulator, capture control
unit, watchdog timer, UART, display, acquisition control
etc. Many locations in the SFR address space are bit-
wise addressable.
Note: Reading from unused locations within data
Conditional branches are performed relative to the
16 bit program counter. The register indirect jump per-
mits branching relative to a 16-bit base register with an
offset provided by an 8-bit index register. Sixteen-bit
jumps and calls permit branching to any location in the
memory address space.
The microcontroller has five methods for addressing
source operands: Register, direct, register-indirect,
immediate, and base register plus index register-indi-
rect addressing.
The first three methods can be used for addressing
destination operands. Most instructions have a “desti-
nation, source” field that specifies the data type,
addressing methods and operands involved. For oper-
ations other than moves, the destination operand is
also a source operand.
Registers in the four 8-register banks can be accessed
through register, direct, or register-indirect addressing.
The lower 128 Bytes of internal data RAM can be
accessed through direct or register-indirect address-
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memory will yield undefined data.
Sept. 10, 2004; 6251-556-3DS
ing, the upper 128 Bytes of internal data RAM through
register-indirect addressing; and the special function
registers through direct addressing. Look-up tables
resident in program memory can be accessed through
base register plus index register-indirect addressing.
2.2.8.1. CPU Hardware
2.2.8.1.1. Instruction Decoder
Each program instruction is decoded by the instruction
decoder. This unit generates the internal signals that
control the functions of each unit within the CPU sec-
tion. These signals control the sources and destination
of data, as well as the function of the Arithmetic/Logic
Unit (ALU).
2.2.8.1.2. Program Control Section
The program control section controls the sequence in
which the instructions stored in the program memory
are executed. The conditional branch logic enables
conditions internal and external to the microcontroller
to cause a change in the sequence of program execu-
tion. The 16-bit program counter holds the address of
the instruction to be executed. It is manipulated with
the
Section 2.2.10..
2.2.8.1.3. Internal Data RAM
The internal data RAM provides a 256-Byte scratch
pad memory, which includes four register banks and
128 direct addressable software flags. Each register
bank contains registers R0 … R7. The addressable
flags are located in the 16-Byte locations starting at
Byte address 20
the RAM address space.
In addition to this standard internal data RAM the
microcontroller contains an extended internal RAM. It
can be considered as a part of an external data mem-
ory. It is referenced by MOVX instructions (MOVX A,
@DPTR), the memory organization is explained in
Section 2.5. on page 47.
2.2.8.1.4. Arithmetic/Logic Unit (ALU)
The arithmetic section of the microcontroller performs
many data manipulation functions and includes the
Arithmetic/Logic Unit (ALU) and the ACC, B, and PSW
registers. The ALU accepts 8-bit data words from one
or two sources and generates an 8-bit result under the
control of the instruction decoder. The ALU performs
the arithmetic operations of add, subtract, multiply,
divide, increment, decrement, BCD-decimal-add adjust
and compare, and the logic operations like and, or,
control
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transfer
and ending with Byte location 2F
instructions
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