SDA5523 Micronas Semiconductor, SDA5523 Datasheet - Page 52

• Manufacturer Part Number: SDA5523
• Description: SDA55xx TVText Pro
• Manufacturer: Micronas Semiconductor

SDA 55xx
2.6.1.4. Mode 3
11 bits are transmitted (through TxD) or received
(through RxD): a start bit (0), 8 data bits (LSB first), a
programmable 9
mode 3 is the same as mode 2 in all respects except
the baud rate. The baud rate in mode 3 is variable.
Table 2–28: Select Mode 0-3 for UART
Table 2–29: Related register
52
SM0
0
0
1
1
Register Name
SCON
See Section 3. on page 110 for detailed register description.
SM1
0
1
0
1
th
Mode
0
1
2
3
data bit and a stop bit (1). In fact,
7
SM0
Description
Shift Reg.
8-bit UART
9-bit UART
9-bit UART
6
SM1
Baud Rate
(CDC = 0)
f
Variable
f
f
Variable
system/12
system/64
system/32
5
SM2
Sept. 10, 2004; 6251-556-3DS
,
4
REN
2.6.2. Multiprocessor Communication
Modes 2 and 3 of the serial interface of the controller
have a special provision for multiprocessor communi-
cation. In these two modes, 9 data bits are received.
The 9th bit goes into register SCON bit RB8. Then
comes a stop bit. The port can be programmed such
that when the stop bit is received, the serial port inter-
rupt will be activated only if RB8 = 1. This feature is
enabled by setting bit SM2 in SCON. A way to use this
feature in multiprocessor communications is as fol-
lows:
When the master microcontroller wants to transmit a
block of data to one of the several slaves, it first sends
out an address Byte which identifies the target slave.
In an address Byte the 9th bit is a ‘1’, a data Byte is
identified with a ‘0’ as 9th. bit.
If the SCON register bit SM2 is set to ‘1’, no slave will
be interrupted by a data Byte. An address Byte how-
ever, will interrupt all slaves, so that each slave can
examine the received Byte and see if it is being
addressed. The addressed slave will clear its SM2 bit
and prepare to receive the data Bytes that will be
transmitted by the master. The slaves that were not
addressed leave their SM2 bits set to 1 and go on with
the execution of the currently running program and
ignore the data Byte transmission on the bus.
the bit SM2 has no effect in mode 0, and in mode 1 the
SM2 bit can be used to check the validity of the stop
bit. In a mode 1 reception, if SM2 = 1, the receive inter-
rupt will not be activated unless a valid stop bit is
received.
Bit Name
3
TB8
2
RB8
1
Ti
DATA SHEET
0
RI
Micronas