T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 10

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

Ambassador T8110L H.100/H.110 Switch
2 Pin Description
2.1 Interface Signals
Table 1. Microprocessor Interface Signals
Table 2. H-Bus (H.100/H.110 Interface) Signals
Table 3. L-Bus (Local) Interface Signals
10
10
RDY (DTACK#)
VPRECHARGE
H110_ENABLE
H100_ENABLE
/CT_FRAME_A
/CT_FRAME_B
WR# (R/W#)
CT_NETREF1
CT_NETREF2
RD# (DS#)
/FR_COMP
WB_SEL
IM_SEL
CT_C8_A
CT_C8_B
Signal
/SCLKx2
CSN
Signal
/C16+
/C16–
CT_D
SCLK
Signal
D
A
/C4
C2
L_SC
L_D
FG
Out
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
In
In
In
Out
I/O
I/O
I/O
Width
Width
32
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
20
16
Width
1
1
1
1
1
1
32
4
8
Precharge voltage for pull-downs, H.110 bus signals:
CT_D, CT_NETREF1, CT_NETREF2.
Pull-down enable for H.110 bus signals: CT_D, CT_NETREF1,
CT_NETREF2.
Pull-up enable for H.100 bus signals: CT_D, CT_NETREF1,
CT_NETREF2, CT_C8_A, CT_C8_B, /CT_FRAME_A, /CT_FRAME_B.
H.100/H.110 bus data.
H.100/H.110 bit clock A.
H.100/H.110 frame reference A.
H.100/H.110 bit clock B.
H.100/H.110 frame reference B.
H.100/H.110 network reference 1.
H.100/H.110 network reference 2.
H-MVIP™ compatibility clock (16.384 MHz, differential).
H-MVIP compatibility clock (16.384 MHz, differential).
MVIP compatibility clock (4.096 MHz).
MVIP compatibility clock (2.048 MHz).
SC-bus compatibility clock.
SC-bus compatibility clock.
Compatibility frame reference.
Word/byte select in.
Address[19:0] in.
Data bus in/out.
RDn(DSn) in.
WRn(R/Wn) in.
CSn in.
RDY(DTACKn) out.
Intel/Motorola select in.
Local bus data.
Local bus clock outputs.
Local frame groups.
Microprocessor Interface Function
Function
Function
Agere Systems Inc.
February 2004