T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 86
T-8110L
Manufacturer Part Number
T-8110L
Description
Manufacturer
AGERE [Agere Systems]
Datasheet
1.T-8110L.pdf
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Ambassador T8110L H.100/H.110 Switch
9 Stream Rate Control
9.2 L-Bus Stream Rate Control Registers
9.2.2 L-Bus 16.384 Mbits/s Operation
Local stream 16.384 Mbits/s operation is implemented as two multiplexed 8.192 Mbits/s streams. Bits are shifted at
16.384 MHz, and 16 bits are shifted per 8.192 Mbits/s time slot (refer to Figure 16). This operation makes use of
adjacent pairs of the existing single-byte hold and shift registers for local stream operation, with the local even
stream assigned as the incoming stream, and the local odd stream assigned as the outgoing stream. Pairs are
assigned as LD[0,1], LD[2,3], . . . LD[30,31]. When an L-bus group is set to operate at rate of 16.384 Mbits/s, the
hold and shift circuitry is configured such that the serial output of the even stream shift register feeds the serial
input of the odd stream shift register (refer to Figure 17).
86
BYTES FROM TIME-SLOT n – 1 TO HOLDING REGISTERS,
L_D[EVEN] (INCOMING),
L_D[ODD] (OUTGOING)
SERIAL DATA:
TIME-SLOT n TO SHIFT REGISTERS
16.384 MHz
8.192 MHz
LOAD OUTGOING BYTES FOR
OFFLOAD INCOMING
15
(continued)
Figure 16. Local Stream 16.384 Mbits/s Timing
14
13
12
11
INCOMING BITS ARE SAMPLED AT
976 ns (ONE 8 Mbits/s TIME-SLOT)
THE 3/4 POINT OF THE BIT TIME
10
(continued)
9
TIME-SLOT n
8
7
6
BYTES FROM TIME-SLOT n TO HOLDING REGISTERS,
5
TIME-SLOT n + 1 TO SHIFT REGISTERS
4
LOAD OUTGOING BYTES FOR
3
OFFLOAD INCOMING
2
1
0
Agere Systems Inc.
February 2004
5-9411 (F)
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