T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 101
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T-8110L
Manufacturer Part Number
T-8110L
Description
Manufacturer
AGERE [Agere Systems]
Datasheet
1.T-8110L.pdf
(164 pages)
- Current page: 101 of 164
- Download datasheet (3Mb)
February 2004
Agere Systems Inc.
10 Error Reporting and Interrupt Control
10.1 Interrupt Control Registers
10.1.9 Interrupt Servicing Registers (continued)
10.1.9.3 Interrupt In-Service Registers
The interrupt in-service registers provide a 16-bit interrupt vector, with unique encoding to indicate which of the
48 possible interrupts is currently in-service.
Table 86. Interrupt In-Service Register
Byte Address
0x006FC
0x006FD
Interrupt In-service Low
Interrupt In-service High
Register Name
(continued)
Bit(s) Mnemonic
7:0
7:0
Reserved
JISOR
(continued)
Ambassador T8110L H.100/H.110 Switch
0000 0000
0001 0000
0001 0001
0001 0010
0001 0100
0001 0101
0010 0000
0010 0001
0010 0010
0010 0100
0010 0101
0100 0000
0100 0001
0100 0010
0100 0100
0100 0101
0001 0011
0001 0110
0001 0111
0010 0011
0010 0110
0010 0111
0100 0011
0000 000 Lower byte of in-service vector;
Value
returns zero.
No interrupt in-service (default).
FG0 interrupt in-service.
FG1 interrupt in-service.
FG2 interrupt in-service.
FG3 interrupt in-service.
FG4 interrupt in-service.
FG5 interrupt in-service.
FG6 interrupt in-service.
FG7 interrupt in-service.
GP0 interrupt in-service.
GP1 interrupt in-service.
GP2 interrupt in-service.
GP3 interrupt in-service.
GP4 interrupt in-service.
GP5 interrupt in-service.
GP6 interrupt in-service.
GP7 interrupt in-service.
SYS0 interrupt in-service.
SYS1 interrupt in-service.
SYS2 interrupt in-service.
SYS3 interrupt in-service.
SYS4 interrupt in-service.
SYS5 interrupt in-service.
Function
101
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