T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 65

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

February 2004
Agere Systems Inc.
6 Clock Architecture
6.7 Clock Circuit Operation—Fallback and Failsafe
6.7.1 Clock Fallback (continued)
6.7.1.1 Fallback Events (continued)
Table 53. Legacy Mode Fallback Event Triggers
6.7.1.2 Fallback Scenarios—Fixed vs. Rotating Secondary
When clock fallback is enabled (register 0x00109, lower nibble), there are two possible scenarios for transitioning
between the primary and secondary clock sets.
In a fixed secondary scheme, a fallback event switches the active clock set from primary to secondary. When the
fallback event is cleared (via user-invoked CLEAR_FALLBACK), the active clock set returns to primary.
In a rotating secondary scheme, a fallback event switches the active clock set from primary to secondary. When
the fallback event is cleared, the secondary remains as the new active clock set. In effect, the secondary becomes
the new primary, and the primary becomes the new secondary.
The concepts are illustrated in the figure below.
Main Input Selector Function (Register 0x00200)
SC-bus clocks (2 MHz or 4/8 MHz)
MVIP clocks (/C4 or C2 bit clock)
Oscillator/crystal
LREF, individual
H-bus, A clocks
H-bus, B clocks
H-MVIP clocks
CT_NETREF1
MC1, R clocks
MC1, L clocks
CT_NETREF
LREF, paired
(continued)
Figure 9. Fallback—Fixed vs. Rotating Secondary
FALLBACK
CLEARED
REGISTER
REGISTER
PRIMARY
(X OR Y)
ROTATING SECONDARY SCENARIO
SET X
SET
FIXED SECONDARY SCENARIO
FALLBACK
FALLBACK
FALLBACK
FALLBACK
CLEARED
EVENT
EVENT
EVENT
SECONDARY
Ambassador T8110L H.100/H.110 Switch
REGISTER
REGISTER
Selected Watchdog Triggers (Legacy Modes)
(X OR Y)
(continued)
SET Y
SCLK, /SCLKx2, and /FR_COMP watchdogs
SET
/C16±, /C4, C2, and /FR_COMP watchdogs
CT_C8_A and /CT_FRAME_A watchdogs
CT_C8_B and /CT_FRAME_B watchdogs
/C4, C2, and /FR_COMP watchdogs
FALLBACK
CLEARED
NETREF1 watchdog
NETREF2 watchdog
None
None
None
None
None
5-9420 (F)
65