T-8110L AGERE [Agere Systems], T-8110L Datasheet - Page 108

• Manufacturer Part Number: T-8110L
• Manufacturer: AGERE [Agere Systems]

Ambassador T8110L H.100/H.110 Switch
11 Test and Diagnostics
11.1 Diagnostics Control Registers
11.1.2 GP Testpoint Enable Register
The GP testpoint enable register allows individual programming of GP[7:0] bits for either standard operation (as
GPIO) or as testpoint outputs. GP testpoint select controls the MUX selection for which testpoints are selected.
Refer to Table 91 on page 109 for testpoint assignments for each GP bit.
Table 90. Testpoint Enable Registers
108
Address
0x00142 Diag2, GP Testpoint
0x00143 Diag3, GP Testpoint Select
Byte
Enable
Name
(continued)
Bit(s) Mnemonic
7:0
7
6
5
4
3
2
1
0
(continued)
GTPSR
GT7EB
GT6EB
GT5EB
GT4EB
GT3EB
GT2EB
GT1EB
GT0EB
LLLL LLLL Value for MUX selection of testpoints
Value
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
GP7 is standard GPIO bit (default).
GP7 is a testpoint.
GP6 is standard GPIO bit (default).
GP6 is a testpoint.
GP5 is standard GPIO bit (default).
GP5 is a testpoint.
GP4 is standard GPIO bit (default).
GP4 is a testpoint.
GP3 is standard GPIO bit (default).
GP3 is a testpoint.
GP2 is standard GPIO bit (default).
GP2 is a testpoint.
GP1 is standard GPIO bit (default).
GP1 is a testpoint.
GP0 is standard GPIO bit (default).
GP0 is a testpoint.
output to GP[7:0]—see Table 90 on
page 108.
Function
Agere Systems Inc.
February 2004