R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 181
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R8A66597BG
Manufacturer Part Number
R8A66597BG
Description
ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R8A66597BG.pdf
(185 pages)
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R8A66597FP/DFP/BG
4.11.5.8 DMA burst transfer write timing (CPU BUS address not used: DFORM=011)
4.11.5.9 DMA burst transfer read timing (CPU BUS address not used: DFORM=011)
Note 5-1 : The control signal when writing data is a combination of DACKi_N(i=0, 1), WR0_N and WR1_N.
Note 5-2 : The control signal when reading data is a combination of DACKi_N and RD_N.
Note 5-3 : The control signal when writing data is a combination of DACK0 and DSTRB0_N.
Note 5-4 : The control signal when writing data is a combination of CS_N, WR0_N and WR1_N.
Note 5-5 : The control signal when reading data is a combination of CS_N and RD_N.
Note 5-6 : When the receipt data is one byte, the data determined time is "(23)td(DREQ-DV)" and the DEND determined
time is "(24)td(DREQ-DendV)".
Note 5-7: RD_N, WR0_N and WR1_N should not be timed to fall when CS_N is rising. Similarly, CS_N should not be timed to
fall when RD_N, WR0_N and WR1_N are rising. In the instances noted above, an interval of at least 10ns must be left open.
Note 5-8: RD_N, WR0_N and WR1_N should not be timed to fall when DACKi_N is rising (or falling). Similarly, DACKi_N should
not be timed to fall (or rise) when RD_N, WR0_N and WR1_N are rising. In the instances noted above, an interval of at least
10ns must be left open.
Note 5-9:The time required until DREQi_N (i=0,1) becomes active is valid, when the next DMA transfer exists, and when tdis
(CTRL-Dreq) or tdis (PCTRLH - Dreq) has slow ratings.
R e v 1 . 0 1
DREQi_N
DACKi_N
DENDi_N
DENDi _N
DREQi_N
DACKi_N
D15-D0
O c t 1 7 , 2 0 0 8
(i=0,1)
(i=0,1)
(i=0,1)
D15-D0
Note 5-6
(i=0,1)
(i=0,1)
(i=0,1)
3
48
48
tw (CTRL_B)
ta (CTRL - D)
tw (CTRL_B)
43
p a g e 1 8 1 o f 1 8 3
tsu (D)
D0
trec (CTRL_B)
D0
tw (cycle2)
(D)
trec (CTRL_B)
tv (CTRL - D) 4
tw (cycle2)
th
44
D1
47-2
47-2
D1
49
49
D2
ta (CTRL - DendV)
11
Dn-1
45
17
17
tsu (Dend) th (Dend)
18
tdis (CTRL - Dreq)
tdis (CTRL - Dreq)
tdis (CTRLH -
Dn
Dn
tv (CTRL - DendV)
Dreq)
12
46
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