R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 75
R8A66597BG
Manufacturer Part Number
R8A66597BG
Description
ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R8A66597BG.pdf
(185 pages)
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R8A66597FP/DFP/BG
2.15 DCP Configuration
Remarks
None
2.15.1 Transfer direction bit (DIR)
2.15.2 Continuous transfer mode bit (CNTMD)
R e v 1 . 0 1
♦ DCP configuration register [DCPCFG]
15-5 Unassigned. Fix to "0".
When using the control transfer for data communication, use the default control pipe (DCP).
3-0 Unassigned. Fix to "0".
3-0 Unassigned. Fix to "0".
Bit
8
7
4
Table 2.14 Relation Between Transmission/Reception Completion Determination for the CNTMD Setup
15
Setup value
CNTMD bit
?
?
CNTMD
Continuous transfer mode
SHTNAK
Pipe disabled at the end of
transfer
DIR
Transfer register
0
1
According to the setup value of this bit, this controller determines transmission/reception completion for the FIFO buffer
assigned to the selected pipe, as shown in Table 2.14.
Set transfer direction of data stage and status stage of control when the Host Controller function is selected.
When the Peripheral Controller function is selected, write "0" to this bit.
14
?
?
O c t 1 7 , 2 0 0 8
Name
If the transfer direction has been set to reception, the condition when the status of the FIFO buffer changes
to Read Possible. When the controller has received one packet.
If the transfer direction has been set to transmission, the condition when the status of the FIFO buffer
changes to Transmission Possible. When following conditions are fulfilled:
(1) The software has written the data of maximum packet size in the FIFO buffer.
(2) The software has written the data of short packet (including the case of 0 byte) and "BVAL=1".
If the transfer direction has been set to reception, conditions for the FIFO buffer to change to Read Enabled
status are:
(1) When 256bytes of received data in the specified FIFO buffer
(2) When the controller receives a short packet other than a zero-length packet
(3) When the contoller receives a Zero-Length packet even though data is already stored in the specified
FIFO buffer of the selected PIPE0.
If the transfer direction has been set to transmission, the condition when the status of the FIFO buffer
changes to Transmission Possible. When (1), or (2) from the following conditions is fulfilled:
(1) When the data count written by the software does not match with one side of FIFO buffer size assigned
(2) When the software writes the data (including 0 bytes) smaller than the data on one side of FIFO buffer
13
?
?
to the selected pipe.
12
?
?
p a g e 7 5 o f 1 8 3
11
?
?
Specifies whether to connect the pipe in continuous
transfer mode.
0: Non-continuous transfer mode
1: Continuous transfer mode
For pipe reception direction, specifies whether to modify
PID to NAK during transfer end.
0: Pipe continued at end of transfer
1: Pipe disabled at end of transfer
Set transfer direction of data stage and status stage of
control when the Host Controller function is selected.
0: Data reception direction
1: Data transmission direction
Read Possible status and method to determine transmission possibility
10
?
?
Value and the FIFO Buffer
9
?
?
CNTMD
8
0
-
Function
SHTNAK
7
0
-
6
?
?
5
?
?
DIR
4
0
-
Software Hardware Remarks
R/W
R/W
R/W
3
?
?
2
?
?
R
R
R
<Address: 5CH>
1
?
?
"0" when
(Write to
P)
H
0
?
?
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