R8A66597BG RENESAS [Renesas Technology Corp], R8A66597BG Datasheet - Page 40

• Manufacturer Part Number: R8A66597BG
• Description: ASSP (USB2.0 2 Port Host/1 Port Peripheral Controller)
• Manufacturer: RENESAS [Renesas Technology Corp]

R8A66597FP/DFP/BG
2.8.2
R e v 1 . 0 1
MBW SetupValue
FIFO port bit (CFIFO, D0FIFO and D1FIFO)
The controller accesses the FIFO buffer assigned to the pipe number written to the CURPIPE bit of various selected
registers (CFIFOSEL, D0FIFOSEL or D1FIFOSEL).
Access to this register is possible only when the FRDY bit of each control register (CFIFOCTR, D0FIFOCTR or
D1FIFOCTR) shows "1" (or while this controller asserts DREQx_N). The valid bits of this register differ according to the
setup value of the MBW and BIGEND bits. The valid bits are shown in Table 2.13.
If writing "MBW =0", the N+0 byte as shown in Table 2.13 can be accessed. During read, access the 16-bit width for
addresses 1H, 18 H and 1AH and use them as 8-bit data on N+0 byte as shown in Table
16-bit width for addresses 14H, 18H and 1AH (access by asserting both WR0_N and WR1_N. In this case, the
controller ignores the N+1 byte as shown in Table 2.13), or access the 8-bit width for addresses 14H, 18H and 1AH
(assert only WR0_N).
If writing "MBW=1", the N+0 byte shown in Table 2.13 can be accessed. During read, access the 16-bit width for
addresses 14H, 18H and 1AH. During write, access the 16-bit width for addresses 14H, 18H and 1AH (access by
asserting WR0_N and WR1_N).
Do not access the address for 15H, 19H and 1BH.
O c t 1 7 , 2 0 0 8
0
0
1
1
BIGEND Setup Value
p a g e 4 0 o f 1 8 3
0
1
0
1
Table 2.13 FIFO Port Valid Bits
N+0 byte
N+1 byte
N+0 byte
b15-b8
Invalid
2.13.
N+0 byte
N+0 byte
N+1 byte
Invalid
b7-b0
During write, access the