M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 135

• Manufacturer Part Number: M1AFS250-FGG256I
• Description: Actel Fusion Family Of Mixed Signal Fpgas
• Manufacturer: Actel Corporation

Table 2-46 • Analog Channel Specifications
Parameter
Voltage Monitor Using Analog Pads AV, AC and AT (using prescaler)
V
Current Monitor Using Analog Pads AV and AC
V
CMRR
t
t
t
Notes:
1. V
2. Analog inputs used as digital inputs can tolerate the same voltage limits as the corresponding analog pad. There is no
3. V
4. An averaging of 1,024 samples (LPF setting in Analog System Builder) is required and the maximum capacitance
5. The temperature offset is a fixed positive value.
6. The high current mode has a maximum power limit of 20 mW. Appropriate current limit resistors must be used, based on
7. When using SmartGen Analog System Builder, CalibIP is required to obtain 0 offset. For further details on CalibIP, refer
CMSHI
CMSHI
CMSHI
INAP
RSM
reliability concern on digital inputs as long as V
allowed across the AT pins is 500 pF.
voltage on the pad.
to the "Temperature, Voltage, and Current Calibration in Fusion FPGAs" chapter of the
Guide.
RSM
IND
1
is limited to V
is the maximum voltage drop across the current sense resistor.
Commercial Temperature Range Conditions, T
Typical: VCC33A = 3.3 V, VCC = 1.5 V
Analog System Characteristics
Input Voltage (Prescaler) Refer to
Uncalibrated Gain and
Offset Errors
Calibrated Gain and
Offset Errors
Bandwidth1
Input Resistance
Scaling Factor
Sample Time
Maximum Differential
Input Voltage
Resolution
Common Mode Range
Common Mode Rejection
Ratio
Strobe High time
Strobe Low time
Settling time
Accuracy
CC33A
Description
+ 0.2 to allow reaching 10 MHz input frequency.
Refer to
page 2-124
Refer to
page 2-125
Refer to
Prescaler modes
page
Refer to
section
DC – 1 KHz
1 KHz - 10 KHz
> 10 KHz
Input differential voltage > 50
mV
IND
2-132)
does not exceed these limits.
Table 3-2 on page 3-3
Table 2-48 on
Table 2-49 on
Table 3-3 on page 3-4
"Current Monitor"
Condition
R e v i s i o n 1
J
(Table 2-54 on
= 85°C (unless noted otherwise),
Actel Fusion Family of Mixed Signal FPGAs
conv.
ADC
Min.
0.02
time
10
5
Typ.
60
50
30
Fusion FPGA Fabric User’s
V
(0.05 x V
– 10.5 to +12
VAREF / 10
RSM
–2 –(0.05 x
Max.
100
200
) to +2 +
RSM
)
Units
KHz
mV
mV
dB
dB
dB
2- 119
µs
µs
µs
µs
V