M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 271

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M1AFS250-FGG256I

Manufacturer Part Number
M1AFS250-FGG256I
Description
Actel Fusion Family Of Mixed Signal Fpgas
Manufacturer
Actel Corporation
Datasheet

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Table 3-13 • Summary of I/O Output Buffer Power (per pin)—Default I/O Software Settings
Differential
LVDS
LVPECL
Applicable to Standard I/O Banks
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS (JESD8-11)
Notes:
1. Dynamic power consumption is given for standard load and software-default drive strength and output slew.
2. P
3. P
DC8
AC10
is the static power (where applicable) measured on VCCI.
is the total dynamic power measured on VCC and VCCI.
C
LOAD
35
35
35
35
(pF)
R e v i s i o n 1
VCCI (V)
2.5
3.3
3.3
2.5
1.8
1.5
Actel Fusion Family of Mixed Signal FPGAs
Static Power
P
DC8
19.54
7.74
(mW)
2
1
(continued)
P
Dynamic Power
AC10
166.52
431.08
247.36
128.46
88.92
89.46
(µW/MHz)
3- 21
3

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