M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 14
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M1AFS250-FGG256I
Manufacturer Part Number
M1AFS250-FGG256I
Description
Actel Fusion Family Of Mixed Signal Fpgas
Manufacturer
Actel Corporation
Datasheet
1.M1AFS250-FGG256.pdf
(330 pages)
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Fusion Device Family Overview
1 - 8
standards. In the family’s larger devices, the north bank is divided into two banks of digital Pro I/Os,
supporting a wide variety of single-ended, differential, and voltage-referenced I/O standards.
Each I/O module contains several input, output, and enable registers. These registers allow the
implementation of the following applications:
VersaTiles
The Fusion core consists of VersaTiles, which are also used in the successful Actel ProASIC3 family. The
Fusion VersaTile supports the following:
Refer to
Figure 1-2 • VersaTile Configurations
X1
X2
X3
LUT-3 Equivalent
•
•
•
•
•
•
Single-Data-Rate (SDR) applications
Double-Data-Rate (DDR) applications—DDR LVDS I/O for chip-to-chip communications
Fusion banks support LVPECL, LVDS, BLVDS, and M-LVDS with 20 multi-drop points.
All 3-input logic functions—LUT-3 equivalent
Latch with clear or set
D-flip-flop with clear or set and optional enable
LUT-3
Figure 1-2
for the VersaTile configuration arrangement.
Y
D-Flip-Flop with Clear or Set
Data
CLK
CLR
D-FF
R e vi s i o n 1
Y
Enable D-Flip-Flop with Clear or Set
Enable
Data
CLK
CLR
D-FFE
Y
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