M1AFS250-FGG256I Actel Corporation, M1AFS250-FGG256I Datasheet - Page 237

• Manufacturer Part Number: M1AFS250-FGG256I
• Description: Actel Fusion Family Of Mixed Signal Fpgas
• Manufacturer: Actel Corporation

Figure 2-140 • Input DDR Timing Model
Table 2-176 • Parameter Definitions
Parameter Name
t
t
t
t
t
t
t
t
DDRICLKQ1
DDRICLKQ2
DDRISUD
DDRIHD
DDRICLR2Q1
DDRICLR2Q2
DDRIREMCLR
DDRIRECCLR
DDR Module Specifications
Input DDR Module
Data
CLK
CLR
Clock-to-Out Out_QR
Clock-to-Out Out_QF
Data Setup Time of DDR Input
Data Hold Time of DDR Input
Clear-to-Out Out_QR
Clear-to-Out Out_QF
Clear Removal
Clear Recovery
INBUF
INBUF
CLKBUF
A
B
C
Parameter Definition
DDR_IN
Input DDR
R e v i s i o n 1
FF1
FF2
Actel Fusion Family of Mixed Signal FPGAs
D
E
Measuring Nodes (from, to)
Out_QF
(to core)
Out_QR
(to core)
C, D
B, D
B, E
A, B
A, B
C, E
C, B
C, B
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